Altera_Forum
Honored Contributor
17 years agoSOPC Builder SPI Core
I want to use the SPOC SPI core to interface to an ADC requiring 24 bit transfers. However, the SPI core only supports transfers upto 16 bit.
Is it possible to do two transfers in order to get the full 24 bits without de-asserting the the slave select line (some devices don't like it if you do)? Update.......... Just read in the manual that you can prevent the slave select line from de-asserting between transfers by setting bit 10 in the control register. Also, how easy is it to do the software programming as Altera state in Ver 8.0 handbook, Volume 5, Section I, & SPI Core: "The SPI core does not match the generic device model categories supported by the HAL, so it cannot be accessed via the HAL API or the ANSI C standard library. Altera provides a routine to access the SPI hardware that is specific to the SPI core." The handbook also states: "This routine is designed for SPI masters of 8-bit data width or less. Currently, it does not support SPI hardware with data-width greater than 8 bits." Has anyone actually used the core successfully for > 16 bit transfers?