Altera_Forum
Honored Contributor
12 years agoSmall peeks in ModelSim simulation
Dear all,
following problem: I have running a full-adder with a testbench, comming up with a peek in the output signal! So, it is not a signal from 0 to 1 or 1 to 0 for a certain duration, it is really just a line! It occurs everytime when 2 of my three input signals change at the same time, meaning: a: 0 --> 0 b: 0 --> 1 c: 1 --> 0 How can I avoid this? Would this effect outputs on the HW? Thanks, MW