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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

slow slew rate on CII

I am using Q7.2 and one of the FireflyII boards (CycloneII), and I want to generate a fast edged clock signal. Even after setting current strength to max in the pin assignments, the slew rate is too ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Using different equipment I see 1.3V/us slew rate on my clock with current strength = max. This is about 2ns rise time, but with large overshoot/undershoot. With OCT set to 25ohm (the only setting allowed for 3.3LVTTL), it looked the same. With current strength = min, it was around 0.6V/us, 5ns rise time, and very clean.

You can't have both a current strength and an OCT assignment at the same time, and it seems to wait until the very end of the build before noticing you want to do something illegal.