Forum Discussion
Altera_Forum
Honored Contributor
15 years agoI think the best way may be write a small program in your favorite programming language to perform the conversion and write the MIF file. Beware of endianess issues.
Another possible alternative (I'm not familiar with FP in Verilog nor VHDL) is to do whatever you need in HDL. You can infer a ROM by declaring an array that is only read synchronously using the "initial" block to initialize it. Quartus can handle complex initialization blocks, including reading from files