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Altera_Forum's avatar
Altera_Forum
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12 years ago

Simulation Freezing

I'm trying to simulate a code written in Verilog in Quartus using ModelSim but whenever it wants to simulate the code I see the whole software freezing. I tried reinstalling the software but it did n...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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Check your verilog.

If you have a simulation loop with no time step, the simulator will get stuck trying to toggle the signals, with no increase in time.

Some classic examples are a forever loop for clock that has no time delay in it, or a counter that has nothing that gates the counting once it starts. (IE it's in a always @ (*) block)

Pete

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I am having the same issue, but I am designing it schematically. Any recommendations?