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Altera_Forum's avatar
Altera_Forum
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17 years ago

Simulating VHDL test bench using Modelsim

can anyone tell me the steps to follow in order to simulate my vhdl test bench with modelsim-altera? I had type my test bench with Quartus II and save the file.
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

thx for the replay. I can simulate the test bench already but when i want to view the waveform in wave window on modelsim, the wave windows appear but is blank didn't have anythings at all... what I should do to view the simulation on the waveform windows?