Altera_ForumHonored Contributor14 years agoSimulating QSYS design with a DDR3 controller Hi, I am having problems simulating a QSYS design with a DDR3 controller with UniPHY. I try to run a simulation by running the generated msim_setup.tcl. Compilation works as expected, but whe...Show More
Altera_ForumHonored Contributor14 years agoFlintstone then keep your design in SOPC until QSys is more solid i guess
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