Forum Discussion
Contributorsimulate AN812
Hi David,
I think the mem_bfm should be the Intel BFM.
I'm not usually use the AN812 design to test the DDR4 and EMIF interface.
The EMIF IP can generate the example design to simulate and test the IP itself.
You can refer to Arria 10 EMIF Design Example User Guide: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20118.pdf
By simulating the example design, you can see all EMIF signals interaction from the memory initialization ,calibration flow and user accesses.
I'm not sure if this something that you trying to get but I'm sure this can give you a good understanding on how the DDR4 and EMIF interface simply work.
Thanks,
Adzim
Regular ContributorHi David,
I think the mem_bfm should be the Intel BFM.
I'm not usually use the AN812 design to test the DDR4 and EMIF interface.
The EMIF IP can generate the example design to simulate and test the IP itself.
You can refer to Arria 10 EMIF Design Example User Guide: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20118.pdf
By simulating the example design, you can see all EMIF signals interaction from the memory initialization ,calibration flow and user accesses.
I'm not sure if this something that you trying to get but I'm sure this can give you a good understanding on how the DDR4 and EMIF interface simply work.
Thanks,
Adzim
ContributorHi Adzim
I may be happy too early. the document is good, but in Quartus 21.3, to follow it step by step doesn't work. I guess there is a very minor variation between the tools revisions.
here are the error message. I got this error message, could you please have a look and give me some suggestion, I guess just one step away from it.
Thank you
Error: (vsim-8345) Unable to find original top-level design units for optimized design "_opt".
# ** Warning: $MODEL_TECH/../intel/verilog/src/mentor/twentynm_atoms_ncrypt.v(40): (vopt-2958) Implicit wire '<protected>' does not have any driver.
# ** Warning: $MODEL_TECH/../intel/verilog/src/mentor/twentynm_atoms_ncrypt.v(40): (vopt-2958) Implicit wire '<protected>' does not have any driver.
# ** Warning: $MODEL_TECH/../intel/verilog/src/mentor/twentynm_atoms_ncrypt.v(40): (vopt-2958) Implicit wire '<protected>' does not have any driver.
# ** Warning: $MODEL_TECH/../intel/verilog/src/mentor/twentynm_atoms_ncrypt.v(40): (vopt-2958) Implicit wire '<protected>' does not have any driver.
# ** Warning: $MODEL_TECH/../intel/verilog/src/mentor/twentynm_atoms_ncrypt.v(40): (vopt-2958) Implicit wire '<protected>' does not have any driver.
# ** Warning: $MODEL_TECH/../intel/verilog/src/mentor/twentynm_atoms_ncrypt.v(40): (vopt-2958) Implicit wire '<protected>' does not have any driver.
# ** Warning: $MODEL_TECH/../intel/verilog/src/mentor/twentynm_atoms_ncrypt.v(40): (vopt-2958) Implicit wire '<protected>' does not have any driver.
# ** Warning: $MODEL_TECH/../intel/verilog/src/mentor/twentynm_atoms_ncrypt.v(40): (vopt-2958) Implicit wire '<protected>' does not have any driver.
# ** Warning: $MODEL_TECH/../intel/verilog/src/mentor/twentynm_atoms_ncrypt.v(40): (vopt-2958) Implicit wire '<protected>' does not have any driver.
# ** Warning: C:/FPGA/EMIF_SIM/emif_0_example_design/sim/ip/ed_sim/ed_sim_mem/altera_emif_mem_model_core_ddr4_191/sim/altera_emif_ddrx_model_rank.sv(1196): (vopt-2697) MSB 19 of part-select into 'address' is out of bounds.
# ** Error: (vsim-8345) Unable to find original top-level design units for optimized design "_opt".
# ** Note: (vsim-12126) Error and warning message counts have been restored: Errors=1, Warnings=333.
# Error loading design
# End time: 08:36:23 on Feb 17,2022, Elapsed time: 0:00:28
# Errors: 1, Warnings: 333
