Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

simple Infinite loop expansion header using Altera DE2-70 Cyclon ii

I write a simple infinite loop to generate an output at expansion header. The reason is I want to generate a simple logic digital signal and probe it at MSO oscilloscope, in order to play around with...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I dont quite understand what you want. The code you have is sequentially executed. It is simulation code. But the synthesisor needs to make a circuit out of it, and loops unroll unto parrallel hardware. Also, timing specs (like the# 5) are completly ignored.

You need to build a system that is synthesisable. Your code suggests you are a software guy. I suggest getting a begineers guide to digital logic, and start reading - forget about the verilog for now.