SignalTap II problem adding nodes

Hi Oliver,

if you have written your own code, e.g. in VHDL and you want to "Tap" signals

which are resolved by the synthesis tool, you can use the attribute keep !

here is an example:

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-- signal declarations

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signal cnt : unsigned (3 downto 0);

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-- attribute declarations

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attribute keep : boolean;

attribute keep of cnt : signal is true;

now, the synthesis tool can't resolve this signal and you will find it in the node list.