ContributorWell, there's your problem. It's getting optimized away. Tap the "upstream" signals that drive this or add virtual pin assignments to the signal in the Assignment Editor.
Super ContributorJust to verify, you've at least run Analysis & Elaboration, if not full synthesis, before trying to use this filter, correct?
Contributoryes, I have re-run the Analysis & Elaboration - got the same result....
I cannot understand what's the problem with the signal ....
Tried to find this signal in the RTL Viewer as well... it doesn't present there!
But, this signal does present in the simulations and the design also works on the board - without this signal the design cannot work... But Quartus how some hides it from the SignalTap and RTL Viewer.... believable...
The file with the signal is a part of the project - I checked this 1000 times !!!
