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I traced a 32bit clock counter.
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That was what I was about to suggest. I did that for these PCIe related traces (see p17)
http://www.ovro.caltech.edu/%7edwh/correlator/pdf/altera_pcie_analysis.pdf I was disappointed with the Altera PCIe core, so did not end up using it. Otherwise I might be more help :)
I don't suppose you know someone with a PCIe bus analyzer ... I'm sure one of those would trace the transactions and tell you what is going wrong ...
Worst-case how about a PCIe host that you can control, eg., an ARM or PowerPC root-complex running U-Boot? You could sequentially perform the PCIe enumeration stages and see where it dies.
Cheers,
Dave
Honored Contributor
