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Altera_Forum's avatar
Altera_Forum
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10 years ago

SignalTap Analyser corrupted signals

Hi there, I am running the standalone SignalTap Analyser as I need to debug a board offshore. I created a SOF file along with a STP file (SignalTap analyser signals). I was able to load the SOF f...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

There is no timing issue with the netlist that I used for this experiment. As for the clock for the SignalTap, it is using the JTAG port and, as far as I know, the JTAG is working fine in their application. I am using a very similar board here and there is no issues at all with the SignalTap Analyser.

Finally, for the hardware, it is a very sophisticated board, so it is hard to describe it. A very similar board is currently used and has being shipped to customer for many years.