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Altera_Forum's avatar
Altera_Forum
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8 years ago

SignalTap - II question

problem: Unable to view certain internal registers in SignalTap II i've tried this (added this to my verilog file). i still don't see any of these registers/wire in signaltap. //one att...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

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For a register that doesn't drive anything(so it may be something like a counter I add for debug and just want to SignalTap),

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Counter current state (output of flops) is driving counter next state. Technically it is driving something correct? Why is there a need for any of these attributes?