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china_cn's avatar
china_cn
Icon for New Contributor rankNew Contributor
4 years ago
Solved

Signaltap：waiting for clock

I instantiated 4 Jesd204b IP cores in the program and generated link_clk with IOPLL. When I use link_clk as a sampling signal for signaltap, signaltap shows the waiting clock. And you can see an erro...
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
4 years ago

You can try with different project and see if the same issue occur. If issue persists, suspect maybe something wrong with the hardware.


  • china_cn's avatar
    china_cn
    Icon for New Contributor rankNew Contributor
    4 years ago

    It may be because the hardware is not configured well. I use USB Blaster for downloading as described above (but there is no problem with the downloader), but using the onboard USB Blaster II works fine. I think I'll be able to debug with a USB cable in the future.
    Thank you