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Altera_Forum
Honored Contributor
12 years agoHi bretulus,
I had used the same logic to do this task. I dont need to generate plsrep but i need to output my clock pulse (clk_plstr in my code) until the counting reach to some value(pls in my code). The coding that I did for this is following: process(clk_plstr,plsrep) ---to reset counter begin if rising_edge(plsrep)then count_reg<= B"000000000000" ; elsif(clk_plstr'event and clk_plstr='1')then count_reg<=count_next; end if; if(clk_plstr'event and clk_plstr = '1')then if(count_reg<=pls )then output<='0'; else output<='1'; end if; else output<='0'; end if; end process; count_next <=count_reg+'1' when(count_reg=B"000000000000" and plsrep='1') else count_reg when (count_reg=B"000000000000") else count_reg+'1' when (count_reg<pls)else B"000000000000"; fout<=output; -----output the clock clk_plstr This gives me the same error as: "Signal output cannot be synthesized, bad synchronous description. The description style you are using to describe a synchronous element (register, memory, etc.) is not supported in the current software release." I am not sure how I can perform this task. Thank you very much.