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AAnch's avatar
AAnch
Icon for New Contributor rankNew Contributor
7 years ago

Shortening NIOSII Simulation run time with FPGA SOC system as recommended in AN351

Hi, As described below i have simulated with NIOSII, RAM & JTAG UART qsys system. Compiled and simulated the example Hello World C code program. From the simulation i see that it takes around 2 ms to...
Ahmed_H_Intel1's avatar
Ahmed_H_Intel1
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Hello,

Are you using custom memory controllers models? This application note discusses the generic memory model and didn't mentioned the differences among all of the memories models.