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Altera_Forum's avatar
Altera_Forum
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17 years ago

Setup time constraints

Hi all, I am currently doing some maintanence on a Flex 10K design which was done many years ago. The deisgn is too implement a VME bus controller which replaces the VIC068A chip from cypress whic...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

I have removed the Tsu constarints that the original designer placed, but still Quartus produces 56 Tsu warnings from inputs pins.

For each warning Quartus informs me that there is a required Tsu of 10 ns on each one, but there is no such constraint. However there are other constraints in place (Tco and multicycle) which I haven´t gotten to as of yet. Is it possible that a Tco constraint would also impose setup time constraint and that this could be the cause?

Many thanks for any help.