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Altera_Forum
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12 years ago

Set_input_delay misunderstanding

Hello: new to sdc constrains I have 2 cases to constrain my serial data coming in and trying to understand the differences Case 1 has been done in previous projects right or wrong b...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

But why the tool would not report fmax with virtual clock in the same way as system clock, after all virtual clock is just imaginary to HELP, is't that hard to be consistent? I really think some people up there just make simple things complicated