Serial transmission seems one step behind where it should be

--- Quote Start ---

If its one clock behind where it should be, then its just a pipelining problem. Add an extra register in the other, parrallel data path and everything is aligned again.

--- Quote End ---

I was thinking that myself but adding an extra wait state did not fix the problem. The processes aren't truly parallel since one has to wait for the other to finish before continuing.

Am I making things too complicated by having separate processes? Would I be better off just combining them into one larger process?