Securely start a State-Machine with pulses or edges

OK, this is an information I dind't give you:

The Start_IN-Signal is generated by an other core, which uses the exactly same 125MHz clock like this component.

Normally for clock crossing I use a kind of handshaking:

Core 1: Set Start_IN to '1'.

-> Core 2: Set Started_OUT to '1' to indicate the Core is started.

-> Core 1: Checks if Core 2 is started and sets Start_IN-Signal to '0'.

-> Core 2: Sets Started_OUT to '0' if it's done with its work.

This works very well, but I can not use this every time.

So you can call me a liar, but you can not call my oszilloscope a liar. I see that there is a synchronous Start_IN-Pulse attached to the correct clock-edge but the next core (on the same clock) doesn't see it.

I know it's strange, but it happens from time to time.