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Altera_Forum
Honored Contributor
Honored ContributorSDC File rules for Synchronizers
Hello All, I feel like this question has been asked before but I must not be searching for the right keywords. Do here it goes again: I have two clock domains in my design. One is the main sy...
Altera_ForumHonored Contributor
Honored Contributoryes you right the old versions of dc fifo were set with false path. However dc fifo glitches and malfunctions are not uncommon and hard to analyse even by Altera support. The assumption is that a false path allows fitter to put registers miles apart and this may be the cause...so avoid it but clock groups may override this assumption. It is all vague isn't it?
