Forum Discussion
GDeXi
Occasional Contributor
Occasional ContributorS10 EMIF IP Error Report
My EMIF is set to ping-pong PHY, because the device contains two teams of CK, CKE, cs_n, ODT, but in the plan stage, such errors are always reported: Error(18612): READDATAVALID signal for sec...
Deshi_Intel
Regular Contributor
Regular ContributorHi,
May I know which Quartus version that you used ?
Also have you cross check you design with EMIF example design as I suggested ?
If EMIF example design also failed then most likely it's IP bug else it could be something that's not connected correctly in your design.
Thanks.
Regards,
Deshi
GDeXiOccasional Contributor
Occasional ContributorHi
I use 19.3 .
yes I have check the example design as you suggested, it passed . but my won design has failed.
Specially，When I Cancelled ping pong Phy , and select DQ width , number of clock, number of chip selects as double to fit my Board , it have passed . but i don't know does it works.
So I very very confused how about my ping pong Phy. Here is my EMIF parameter :
