Forum Discussion
GDeXi
Occasional Contributor
6 years agoS10 EMIF IP Error Report
My EMIF is set to ping-pong PHY, because the device contains two teams of CK, CKE, cs_n, ODT, but in the plan stage, such errors are always reported: Error(18612): READDATAVALID signal for sec...
Deshi_Intel
Regular Contributor
6 years agoHI,
The error message is basically complaining user is not connecting any signal to the amm_* port. Looks like you leave amm_* port floating without connection
- After you export the amm_* port to top level design, did you connect the amm_* to your own user logic ?
- Else you can also connect the amm_* port in platform designer directly to your own user design
If you are still confused, then you can easily generate the example design from EMIF IP directly. After that, open the example design to study the design connection.
Attached is the example design connection reference.
Thanks.
Regards,
dlim
GDeXi
Occasional Contributor
6 years agoHi
after export amm_* port , I am sure I connect it to my own user logic, and it simulation passed. but go to Plan ,it has failed.
Now I change my way, i Encapsulate user logic into IP and add it to platform design it also have same error .