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Altera_Forum
Honored Contributor
Honored ContributorROM and RAM connection
Hello, Im trying to connect ROM with RAM blocks,for this Im write top level entity and connected output of ROM with RAM This is code for ROM LIBRARY ieee; USE ieee.std_logic_1164.all;
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Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- I want that my datawidth should be 256 --- Quote End --- why, 256 bits address requires memory size of 2^256 an that is nearly equal to all Universe rams put together??
