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Altera_Forum
Honored Contributor
10 years agoROM and RAM connection
Hello, Im trying to connect ROM with RAM blocks,for this Im write top level entity and connected output of ROM with RAM This is code for ROM LIBRARY ieee; USE ieee.std_logic_1164.all;
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Altera_Forum
Honored Contributor
10 years agoc2 data_a is std_logic_vector and you are connecting it to integer..