"Report path" in time Quest timing analyzer, optimization of orignal circuit

It's not the timing analyzer that's optimizing your design, it's synthesis and the Fitter. What exactly are you trying to see? The analysis is always based on the netlist or snapshot you choose, so you could try (in the Standard edition) to create the timing netlist based off the post-map netlist (in the Pro edition, you'd select the earliest snapshot available, Planned, I believe). But if your design is already fully compiled, the timing analyzer is always going to use the post-fit netlist in order to provide accurate final timing numbers.