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MTett's avatar
MTett
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7 years ago

Relative paths in SystemVerilog

I want to include a text file I want to read and write to. However, verilog is unable to find the text in the current directory. How do I determine relative path in System Verilog. I have tried the ...
KennyT_altera's avatar
KennyT_altera
Icon for Super Contributor rankSuper Contributor
7 years ago
It should work, can you attached your design.qar here to have a look? file = $fopen("data.txt", "r");
  • MTett's avatar
    MTett
    Icon for New Contributor rankNew Contributor
    7 years ago

    My bad. So basically I am using a tool(connects to modelsim) which automates the simulation of this design module against a testbench. So it works with the individual files as opposed to the project file. This could be the problem.