Forum Discussion
REG: PCIE gen3x16
For our tracking purpose may I know which Quartus verion and s10 part no: you are using
Hi
I am using latest version of Quartus tool 20.2 and i am using Intel PCIE p tile avmm and i need to access 4 DDR memories from this.
do you have any reference design or P-tile pcie Ip connection ?
device family : stratix 10
part no : 1SD280PT2F55E1VG
Thanks
- Rahul_S_Intel16 years ago
Frequent Contributor
PCIe + DDR connection reference design , is not published
- 106 years ago
New Contributor
Hi ,
I have warning on reset in intel P-tile PCIe avmm.
I have attached snapshot of that
please resolve it
below pins are having doubt on connect to PCIE 512 bit controller.
pin_perst
core_clkout_ip
refclk_0
refclk_1
p0_app_clk
thanks in advance
- Rahul_S_Intel15 years ago
Frequent Contributor
Requesting to open a new thread for the above question for our tracking purpose . And I am closing this tread now