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PFour2
New Contributor
New ContributorReference Clock/InClock for the LVDS SERDES I/OPLL in the Arria 10 on Quartus 18.1
Hello, I am working on Quartus Pro 18.1 with an Arria 10. In the design I need to use, as a tranceiver, a LVDS SERDES IP for 18 channels in the Bank 3A. The problem I have is in regard of the Refe...
AndyN
Occasional Contributor
Occasional ContributorThe issue with not using a dedicated input clock is that your generated clock's jitter can end up being terrible. Is this a custom board you are designing or an off-the-shelf solution?
