Altera_Forum
Honored Contributor
12 years agoReducing code
Hi there,
I'm very new to VDHL, its part of an electronics degree I'm studying. I am getting on quite well, understand the most of it and can create quite well. Where I come unstuck is reducing my code down so it doesn't look like war and peace! Anyone have any suggestions on how to reduce what I have created below? This is the only format that I can successfully test. This process is driven from a 0 to 5 up counter. Whats annoying is that when count = (1 and 2), it is the same required output for when count = (5 and 4). But because the counter only goes up i have to complete a full cycle. I'm sure there is a better way, I'm currently looking how to combine the 2 processes into one. process (count) begin case count is when 0 => a <= '0'; b <= '0'; c <= '1'; d <= '1'; e <= '0'; f <= '0'; when 1 => a <= '0'; b <= '1'; c <= '1'; d <= '1'; e <= '1'; f <= '0'; when 2 => a <= '1'; b <= '1'; c <= '0'; d <= '0'; e <= '1'; f <= '1'; when 3 => a <= '1'; b <= '0'; c <= '0'; d <= '0'; e <= '0'; f <= '1'; when 4 => a <= '1'; b <= '1'; c <= '0'; d <= '0'; e <= '1'; f <= '1'; when 5 => a <= '0'; b <= '1'; c <= '1'; d <= '1'; e <= '1'; f <= '0'; end case; end process;