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Altera_Forum
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8 years ago

Reduce logic utilization

Hi, I have this part in my kernel where it takes too much logic if(relu == 1){ if(out < 0 ) conv_in = 0.1*out; else conv_in = out; } out is a float data. The report...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi WitFed,

I am trying to reduce the logic utilization, as its can not fit into FPGA design. I am confused why creating conv_in = 0.125*out - 0.03125*out will reduce the logic utilization? Shouldnt it be using more logic in subtractor ?