'real' bit-accuracy, and bypassing 'integer' to make 'signed/unsigned' constant value

I have very little floating point experience, and what little I do have has used the altera fp IP cores. But Ive mostly used 8/23 format.

You should be able to just convert the float_pkg to the appropriate sizes. In VHDL 2008 you can instantiate the package with generics to set the size of your local package without having to change the source, but this is not supported by Quartus yet (it is in modelsim though). I highly recommend you do not do any logic with this package, as it will be very very slow as it is not pipelined.