Read/Write Access in Nios II

The CPU won't read in a wrong location, it will read a cached value.

The first time you read a register from your component, the CPU will read it and store the value in its data cache.

The second time you read the same register, the CPU will read the value in its cache rather than accessing your peripheral again. This is a nice feature with external RAM, as access to the cache is a lot faster than an external memory. But for a component it may not be desirable, as the value of the register can change, and the CPU won't see it as long as it reads from it's cache.

You can force the CPU to bypass the cache and access your component on every access by using the IORD/WR macros or change your pointer with the alt_remap_uncached() routine.