Reading Data in PC from MAX10 FPGA board

I should elaborate my idea about how I will do it.

I have already a system built in schematic editor that generates some data. I'll write the data after certain time in a memory and I need this data to get on my PC.

So how I'm going to integrate my custom design with rs232 ip core in Qsys? Should I generate a hdl code from my custom design and add the code for rs232 ip core at the end? Then I synthesize the rewritten hdl in Qsys? I am failing to grasp the idea how an avalon master such as nios2 should be used in my qsys design?

Thanks in advance.