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Altera_Forum's avatar
Altera_Forum
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14 years ago

reading data from memory model, possible or not?

Hi,

Can we read the data written to a DDR2 memory 'model'? I am talking about the default model generated by UniPHY/ AltMemPHY. I have tested my program on the actual hardware but in the simulation I can not read back the value that I wrote in the memory. I get a avl_rdata_valid signal after I issue the read command but the data is either all 0's or all x's.

At the moment, I am not asking about solution for the problem, I only want to know 'if it is possible to store data into the memory model and to read the stored data from the memory model'

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    yes, you should be able to read and write to the memory model. try running Altera's example design to confirm model behavior

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Hi,

    Many thanks for your reply. Please, confirm if you have yourself wrote and read from 'memory model'. Can you explain how it saves the data? It stores in PC RAM or writes the data to a local file in the PC? If its a file where it writes the data, can you help me identify the file. I am actually confused because the same program worked fine with the actual hardware and is not responding properly in simulation. Please, note that the program is not totally dead, it asserts _rdata_valid signal a few cycles after a read_req is issued.

    To be more clear, I have made changes in <variation_name>_example_sim_<variation_name>_example_sim.v which is instantiated in <variation_name>_example_sim.v which itself is instantiated in <variation_name>_example_sim_tb.v

    PS: I can not test the example simulation project because I have made changes to it.
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    yes, i have

    i still say you can confirm the functionality of the memory model with Altera's example design. then you can go back to your design and find the problem

    i doubt it models the RAM on disk, that sounds slow
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Hi again,

    I ran the example design as you suggested but the problem is same. Every time a write command is issued (as it says on the transaction screen with blue text) a BAD WRITE is replied in the next line. And whenever it reads, all 0's are read. And when it compares the written and read data it stops with the message that simulation failed.

    I am sure the write operation is somehow causing the problem. The BAD WRITE also appears in my case, any suggestions now?