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No its not smart recomple or partitioning it's the new feature on Quartus 9.1.
http://www.altera.com/products/software/quartus-ii/whats-new/swf-qts-whats-new.html?gsa_pos=2&wt.oss_r=1&wt.oss=rapid%20recompile I set it using...
set_global_assignment -name RAPID_RECOMPILE_MODE
COMPATIBLE_PLACEMENT
I've found it to be of little use, unless I'm doing something wrong.
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Hi Witty,
I was not aware of this new feature, but I can imagine how it works. The feature could only work in case that Quartus found a lot of nodes which does not change. I'm pretty sure that changing the input value of the reset will cause a lot of changes in your FPGA implementation. I would try a change which influenced only a small portion of your design (e.g reduce the number of bits of a counter)
Kind regards
GPK
Honored Contributor
