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Altera_Forum
Honored Contributor
15 years agoAs there is a Fifo in play, the solution can be as simple as:
Use a DCFIFO of 24 bits wide and write the data into this fifo with the slow Clk1x. Then at the read side use a clock of at least 3 times the frequency to read 24 bits out of the fifo and multiplex the 24 bits into packets of 8 bits. Don't try to dodge clock domain crossing (as Tricky advises), it will come back and haunt you (no pun intended with the upcoming Halloween frenzy).