Quick Question - How to event on multiple clocks rising edges?

I agree with the josyb solution.

Run a state machine on the falling edge of the fast clock.

The state machine counts for consecutive low levels of the slow clock, then it enables a second state machine clocked on the rising edge of the fast clock that will be enabled when both slow and fast clock are rising (or something like that).

P.S. How many answers. Your question has triggered the FPGA design people :-)