Question about good design: overriding functions, function parameters or similar

You havent been very clear. I think you are using the term function (which is a VHDL keyword) to mean functionality.

Entities can be given generics which are constants, but can be set during module instantiation (design elaboration phase). These can be used to completly change the functionality of any entity, usually using generate statements. Generates act at elaboration time.

You can use generics anywhere inside the code.

Re-useable code often uses generics to make a module parameterisable.