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VHDL_User's avatar
VHDL_User
Icon for New Contributor rankNew Contributor
4 years ago

Questa Simulation Not Showing All Needed Variables

I am using Quartus to write my program in and am trying to simulate this in Questa. My program compiles in both applications. When I begin simulation in Questa, some inputs and outputs are missing. T...
KCMurphy's avatar
KCMurphy
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

It's probably a good thing to read msim_setup.tcl and create your own startup call into that, using ld_debug and enum_debug as shown in the verbose output from the setup tcl. But I wouldn't go so far as to modify them directly as they can get recreated by Quartus.

Here's my normal startup:

do ../mentor/msim_setup.tcl
set TOP_LEVEL_NAME testbench_test
set FORCE_MODELSIM_AE_SELECTION true
set SILENCE true
elab_debug -suppress 3016 -t 1ps
do wave.do

and my rebuild when I create a new IP module in quartus and generate a new script for msim.

do ../mentor/msim_setup.tcl
set TOP_LEVEL_NAME testbench_test
set FORCE_MODELSIM_AE_SELECTION true
set SILENCE true
ld_debug -suppress 3016 -t 1ps