Forum Discussion
tehjingy_Altera
Regular Contributor
3 years agoHi
Any update on this case?
Regards
Jingyang, Teh
- sneha_wagh3 years ago
New Contributor
Hi Jingyang,
Don't know why my last update did not get posted here. I was trying to say that most of the documents mentioned that with the help of mailbox client IP, any FPGA logic can access the Flash once configuration is done. The are of the flash can be divided to store configuration bitstream and the application f/w.
So as of now it resolved all queries. For queries related to integration of debug trace logic, I will open a separate case. We can close this case.
Regards
Sneha