Forum Discussion
Altera_Forum
Honored Contributor
10 years agoQuatus TCL Integration with Assignments
So I'm trying to build a date/time register that is updated every build. I was going to use a TCL script to generate a global assignment, and then use that global_assignment in my VHDL code as a regi...
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- No, you cannot access global_assignments from VHDL. However, you can have TCL spit out some VHDL (a package for example) with some constants in it that set the values of some registers. --- Quote End --- That's a great idea. I'll instantiate a block is generated by a TCL script to spit out a constant. That's an acceptable workaround. I'm surprised there isn't a megafunction for "build time".