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Altera_Forum
Honored Contributor
Honored ContributorQuatus TCL Integration with Assignments
So I'm trying to build a date/time register that is updated every build. I was going to use a TCL script to generate a global assignment, and then use that global_assignment in my VHDL code as a regi...
Altera_ForumHonored Contributor
Honored ContributorNo, you cannot access global_assignments from VHDL.
However, you can have TCL spit out some VHDL (a package for example) with some constants in it that set the values of some registers.
