Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

QuartusII: Invalid assignment for clock

solved the problem was to leave a space between '10' and '[' : create_clock -period 10 [get_ports ref_clk_i] ***************************************************** Hi all, before ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

I've created the .sdc file and I've added it to the project;

I restarted the compilation and I noticed that the number of warnings is decreased, but however remains this:

warning: the following clock transfers have no clock uncertainty assignment

warning: from ref_clk_i (rise) to ref_clk_i (rise) (setup and hold)

and I don't know why.

Can you help me?