Forum Discussion
Altera_Forum
Honored Contributor
14 years agothen clearly, as a testbench, it is not appropriate for synthesis and should not be compiled with quartus, you are only meant to simulate it in a simulator (such as modelsim).
You cannot compile log package in quartus, or any files that use it. you will either have to make another top level file with connections to pins on your chip, or if the testbench does that (which it should not) put these comments around log_package and anything in the code that uses log_package.
--synthesis translate_off
..anything here is ignored by the compiler
use work.log_package.all;
--synthesis translate_on