Quartus True and Simple DPRAM issue - does this affect Quartus II version 15.1 designs

For Cyclone IV designs using dual port ram compiled with Quartus II v15.x (or v14.x), are the True and simple DPRAM issues affecting Quartus Prime v18.1 and v20.1 relevant to the older revisions of compilers.

I am responsible for the sustaining of a number of mature products using cyclone IV FPGAs.

I would like to know whether time and effort need be expended to investigate this recent Quartus Prime PCN for DPRAM ram implementations using older revision compilers.

Most of the designs I am referring to were compiled using Quartus II v15.1

I would appreciate some feedback.

Thanks