Wes
New Contributor
3 years ago`quartus_syn` was unexpectedly terminated by signal 6
I am trying to compile a design targeting an Agilex (AGFB027R31C3I3V) and during the Analysis & Synthesis phase it quits with the following error (no other context):
Error(20549): Current module quartus_syn was unexpectedly terminated by signal 6. This may be because some system resource has been exhausted, or quartus_syn performed an illegal operation. You can view system resource requirements on the System and Software Requirements page of the Intel FPGA website (https://fpgasoftware.intel.com/requirements/).
I have seen a similar error before when compiling on a server with insufficient RAM, but the machine being compiled on now has over 300GB of RAM.
Operating System: CentOS 7, Linux kernel 3.10.0