Forum Discussion
Elegan
New Contributor
7 years agoQuartus Prime Pro 19.2 quits unexpected with following error report. Does anybody know, what's the problem in this case?
Problem Details Error: Internal Error: Sub-system: CDB_SGATE, File: /quartus/db/cdb_sgate/cdb_sgate_component.cpp, Line: 926 Port direction does not agree. Stack Trace: 0x5f4ac: CDB_SGATE_COM...
KhaiChein_Y_Intel
Regular Contributor
7 years agoHi,
I received the feedback from the team today. Please see the feedback below.
The issue is that Tri8.bsf shows that tridata is of type bidir, but in Tri8.vhd, tridata is an output. You need to fix the design so that the Tri8 symbol used in TriTest.bdf matches the implementation of Tri8 in Tri8.vhd. Right now the Tri8 symbol says that tridata is a bidir but in Tri8.vhd tridata is an output. If you make the two match the design goes through.
You are encourage to move away from using bdf. It is much better to a modern language that is also used by other tools, i.e. Verilog, systemverilog or vhdl.
Thanks.