Forum Discussion
AAlte2
New Contributor
New ContributorQuartus prime lite: NO .sdo output file
I'm new with timing simulation and I have some difficulties with the implementation and I think it's because the timing, I don't want to go through the full story just to make it simple, so what I'm...
CalvinJoaz_P_Intel
Contributor
ContributorHi AAlte2,
Post-fit Standard Delay Output File (.sdo) doesn't support for Cyclone V for gate level simulation.
Kindly refer to the link below.
https://www.intel.co.jp/content/dam/altera-www/global/ja_JP/pdfs/literature/ug/ug_intro_to_megafunctions.pdf - Table 9 -Page 20.
Thanks.
